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  american microsystems, inc. december 2000 this document contains information on a preproduction product. specifications and information herein are subject to change with out notice. 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 1.0 features ? on-chip tunable voltage-controlled crystal oscillator circuitry (vcxo) allows precise system frequency tuning (pull range typically 300ppm) ? vcxo tuning range: 0-3v ? uses inexpensive fundamental-mode crystals ? two integrated phase-locked loops (pll) multiply vcxo frequency to the higher system frequencies needed ? 5v core supply voltage (contact factory for 3.3v) ? 3.3v / 5v output supply voltage ? small circuit board footprint (20-pin soic) ? custom frequency selections available - contact your local ami sales representative for more information figure 1: pin configuration 1 16 2 3 4 5 6 7 8 15 14 13 12 11 n/c xout xin vdd xtune vss oe n/c n/c clkb vss vddo n/c fs6245 9 10 clka n/c 18 17 n/c clkc 20 19 n/c n/c n/c 2.0 description the fs6245 is a monolithic cmos clock generator ic designed to minimize cost and component count in digital video/audio systems. at the core of the fs6245 is circuitry that implements a voltage-controlled crystal oscillator when an external resonator is attached. the vcxo allows device frequen- cies to be precisely adjusted for use in systems that have frequency matching requirements, such as digital satellite receivers. two high-resolution phase-locked loops generate the output clock frequencies (clka, clkb, and clkc). these frequencies are phase-locked and frequency- locked to the vcxo frequency. synthesis error of the plls is +/-0 ppm unless otherwise noted. table 1: crystal / output frequencies device f xin (mhz) clka (mhz) clkb (mhz) clkc (mhz) FS6245-01 13.500 11.0592 18.432 27.000 note: contact ami for custom pll frequencies figure 2: block diagram vcxo fs6245 pll xout xin clka xtune divider array clkb pll clkc
american microsystems, inc. december 2000 2 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll dual pll dual pll dual pll vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 table 2: pin descriptions key: ai = analog input; ao = analog output; di = digital input; di u = input with internal pull-up; di d = input with internal pull-down; dio = digital input/output; di-3 = three-level digital input, do = digital output; p = power/ground; # = active low pin pin type name description 1 - n/c no connection 2 ai xin vcxo crystal feedback 3 ao xout / fref vcxo crystal drive / external reference clock input 4 p vdd core power supply 5 ai xtune vcxo tune input 6 - n/c no connection 7 p vss ground 8di u oe output enable 9doclkaclock output ?a? 10 - n/c no connection 11 - n/c no connection 12 - n/c no connection 13 do clkb clock output ?b? 14 p vss ground 15 p vddo output power supply (must be less than or equal to vdd) 16 - n/c no connection 17 - n/c no connection 18 do clkc clock output ?c? 19 - n/c no connection 20 - n/c no connection
american microsystems, inc. december 2000 3 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 3.0 functional block description 3.1 phase-locked loop (pll) the on-chip pll is a standard frequency- and phase- locked loop architecture. the pll multiplies the reference oscillator to the desired frequency by a ratio of integers. the frequency multiplication is exact with a zero synthe- sis error (unless otherwise noted). 3.2 voltage-controlled crystal oscillator (vcxo) the vcxo provides a tunable, low-jitter frequency refer- ence for the rest of the fs6245 system components. loading capacitance for the crystal is internal to the fs6245. no external components (other than the crystal resonator itself) are required for operation of the vcxo. continuous fine-tuning of the vcxo frequency is accom- plished by varying the voltage on the xtune pin. the oscillator operates the crystal resonator in the paral- lel-resonant mode. crystal warping, or the ?pulling? of the crystal oscillation frequency, is accomplished by altering the effective load capacitance presented to the crystal by the oscillator circuit. the actual amount that changing the load capacitance alters the oscillator frequency will be dependent on the characteristics of the crystal as well as the oscillator circuit itself. specifically, the motional capacitance of the crystal (usu- ally referred to by crystal manufacturers as c 1 ), the static capacitance of the crystal (c 0 ), and the load capacitance (c l ) of the oscillator determine the ?warping? or ?pulling? capability of the crystal in the oscillator circuit. a simple formula to obtain the warping capability of a crystal oscillator is: () ()() c c c c c c c ppm f l l l l 1 0 2 0 6 1 2 1 2 10 ) ( + + ? = ? where c l1 and c l2 are the two extremes of the applied load capacitance. example: a crystal with the following parameters is used. with c 1 = 0.025pf, c 0 = 6pf, c l1 = 10pf, and c l2 = 20pf, the tuning range is () ()() ppm . f 300 10 6 20 6 2 10 6 10 20 025 0 = + + ? = ? . fs6245 typical vcxo deviation vs. xtune input -200 -150 -100 -50 0 50 100 150 200 250 00.511.522.53 v(xtune) - volts deviation from 13.500mhz - ppm
american microsystems, inc. december 2000 4 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll dual pll dual pll dual pll vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 4.0 electrical specifications table 3: absolute maximum ratings stresses above those listed under absolute maximum ratings may cause permanent damage to the device. these conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. exposure to maximum rati ng conditions for extended conditions may affect device performance, functionality, and reliability. parameter symbol min. max. units supply voltage (v ss = ground) v dd v ss -0.5 7 v input voltage, dc v i v ss -0.5 v dd +0.5 v output voltage, dc v o v ss -0.5 v dd +0.5 v input clamp current, dc (v i < 0 or v i > v dd )i ik -50 50 ma output clamp current, dc (v i < 0 or v i > v dd )i ok -50 50 ma storage temperature range (non-condensing) t s -65 150 c ambient temperature range, under bias t a -55 125 c junction temperature t j 125 c lead temperature (soldering, 10s) 260 c input static discharge voltage protection (mil-std 883e, method 3015.7) 2 kv caution: electrostatic sensitive device permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy ele c- trostatic discharge. table 4: operating conditions parameter symbol conditions/description min. typ. max. units core supply voltage (vdd) v dd 5v 10% 4.75 5 5.25 v clk pin supply voltage (vddo) v ddo 3.0 - v dd +0.3 v ambient operating temperature range t a 070c crystal resonator frequency f xtal fundamental mode 5 13.5 18 mhz crystal resonator motional capacitance c 1(xtal) at cut 25 ff crystal load capacitance c l(xtal) at cut 14 pf
american microsystems, inc. december 2000 5 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 table 5: dc electrical specifications unless otherwise stated, v dd = 5v 10%, no load on any output, and ambient temperature range t a = 0c to 70c. parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. where given, min and max characterization data are 3 from typical. negative currents indicate current flows out of the device. parameter symbol conditions/description min. typ. max. units overall supply current, dynamic, with loaded outputs i dd f xtal = 13.5mhz; c l = 10pf 20 ma voltage controlled crystal oscillator - vdd=5.0v crystal loading capacitance c l(xtal) as seen by a crystal connected to xin and xout (@ v xtune = 1.65v) 14 pf crystal resonator motional capacitance c 1(xtal) at cut 25 ff vcxo tuning range f xtal = 13.5mhz; c l(xtal) = 14pf; c 1(xtal) = 25ff 300 ppm vcxo tuning characteristic note: positive ? f for positive ? v 100 ppm/v crystal drive level r xtal =20 ? ; c l(xtal) = 14pf 200 uw clock outputs (clkx) - vddo=3.3v high-level output source current * i oh v o = 2.0v -40 ma low-level output sink current * i ol v o = 0.4v 17 ma z oh v o = 0.5v dd ; output driving high 30 output impedance * z ol v o = 0.5v dd ; output driving low 30 ? short circuit source current * i osh v o = 0v; shorted for 30s, max. -55 ma short circuit sink current * i osl v o = 3.3v; shorted for 30s, max. 55 ma clock outputs (clkx) - vddo=5.0v high-level output source current * i oh v o = 4.5v -30 ma low-level output sink current * i ol v o = 0.4v 26 ma z oh v o = 0.5v dd ; output driving high 25 output impedance * z ol v o = 0.5v dd ; output driving low 25 ? short circuit source current * i osh v o = 0v; shorted for 30s, max. -100 ma short circuit sink current * i osl v o = 5v; shorted for 30s, max. 100 ma
american microsystems, inc. december 2000 6 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll dual pll dual pll dual pll vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 table 6: ac timing specifications unless otherwise stated, v dd = 5v 10%, no load on any output, and ambient temperature range t a = 0c to 70c. parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. where given, min and max characterization data are 3 from typical. parameter symbol conditions/description min. typ. max. units overall vcxo stabilization time * t vcxostb from power valid 10 ms pll stabilization time * t pllstb from vcxo stable 500 us output frequency synthesis error (unless otherwise noted in frequency table) 0 ppm clock output (clk) duty cycle * ratio of high pulse width (as measured from rising edge to next falling edge at v dd /2) to one clock period 45 55 % jitter, period (peak-peak) * t j( ? p) from rising edge to next rising edge at v dd /2, c l = 10pf 300 ps jitter, long term ( y ( )) * t j(lt) from 0-500 s at v dd /2, c l = 10pf compared to ideal clock source 150 ps rise time * t r v dd = 5v; v ddo = 3.3v; v o = 0.3v to 3.0v; c l = 10pf 1.8 ns fall time * t f v dd = 5v; v ddo = 3.3v; v o = 0.3v to 3.0v; c l = 10pf 1.4 ns rise time * t r v dd = 5v; v ddo = 5.0v; v o = 0.5v to 4.5v; c l = 10pf 1.4 ns fall time * t f v dd = 5v; v ddo = 5.0v; v o = 4.5v to 0.5v; c l = 10pf 1.25 ns
american microsystems, inc. december 2000 7 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic dual pll vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 5.0 package information table 7: 20-pin soic (0.300") package dimensions dimensions inches millimeters min. max. min. max. a 0.0926 0.1043 2.35 2.65 a 1 0.004 0.0118 0.10 0.30 b 0.013 0.020 0.33 0.51 c 0.0091 0.0125 0.23 0.32 d 0.4961 0.5118 12.60 13.00 e 0.2914 0.2992 7.40 7.60 e 0.05 bsc 1.27 bsc h 0.394 0.419 10.00 10.65 h 0.010 0.029 0.25 0.75 l 0.016 0.050 0.40 1.27 0 8 0 8 be d a 1 seating plane base plane c l h e american microsystems, inc. a h x 45 table 8: 20-pin soic (0.300") package characteristics parameter symbol conditions/description typ. units thermal impedance, junction to free-air ja air flow = 0 m/s 80 c/w lead inductance, self l 11 center lead 2.5 nh lead inductance, mutual l 12 center lead to any adjacent lead 0.85 nh lead capacitance, bulk c 11 center lead to v ss 0.42 pf lead capacitance, mutual c 12 center lead to any adjacent lead 0.08 pf
american microsystems, inc. december 2000 8 12.12.00 fs6245 fs6245 fs6245 fs6245 dual pll dual pll dual pll dual pll vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic vcxo clock generator ic iso9001 iso9001 iso9001 iso9001 6.0 ordering information ordering code device number package type operating temperature range shipping configuration 11640-223 FS6245-01 20-pin (0.300?) soic (small outline package) 0 c to 70 c (commercial) tape and reel copyright ? 1998-2000 american microsystems, inc. devices sold by ami are covered by the warranty and patent indemnification provisions appearing in its terms of sale only. ami makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the fr eedom of the described devices from patent infringement. ami makes no warranty of merchantability or fitness for any purposes. ami re - serves the right to discontinue production and change specifications and prices at any time and without notice. ami?s products are intended for use in commercial applications. applications requiring extended temperature range, unusual environmental require- ments, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recom- mended without additional processing by ami for such applications. american microsystems, inc., 2300 buckskin rd., pocatello, id 83201, (208) 233-4690, fax (208) 234-6796, www address: http://www.amis.com e-mail: tgp@amis.com


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